1. Field of the Invention
This invention relates to integrated circuit packages and to electronic devices incorporating integrated circuit packages.
2. Description of the Prior Art
An integrated circuit (IC) package is a structure used to electrically connect an IC die (chip) to a printed circuit board (PCB) or other host structure. Each die typically includes input/output (I/O) terminals which are arranged along a peripheral edge of the die. After the die is mounted on a package, the I/O terminals are electrically connected to bonding pads formed on the package using, for example, wire bond techniques. The package typically includes conductive lines which are electrically connected to external contacts such as, for example, pins, leads or solder bumps. When the package is mounted onto a PCB, electrical signals are transmitted between the PCB and the die through these external contacts.
Recent develops in IC fabrication have resulted in dies with increasingly-large numbers of I/O terminals, and which generate increasingly-large amounts of heat. In addition, certain electronic devices, such as those used in wireless or telecommunication applications, are increasingly sensitive to electromagnetic interference (EMI) and radio frequency interference (RFI).
To keep pace with the developments in IC fabrication, there is an on-going need for IC packages having improved electrical characteristics and thermal characteristics. The term "electrical characteristics" is used herein to refer to a package's effective inductance and to the package's ability to shield electromagnetic interference (EMI) and radio frequency interference (RFI). "Improved" electrical characteristics refers to reduced effective inductance and greater EMI/RFI shielding. The term "thermal characteristics" is used herein to refer to a package's ability to dissipate a large amount of heat generated during operation of the die such that the die is maintained at an optimal operating temperature.
Present integrated circuit packages capable of handling a large number of interconnections include ball grid array (BGA) packages.
FIG. 1(A) is a cross-sectional view of a standard plastic BGA (PBGA) package 10 including an integrated circuit die 12 mounted on an upper surface of a substrate 14. Substrate 14 includes inner bonding pads 16 formed on the upper surface and outer bonding pads 18 formed on the lower surface of substrate 14. Conductive vias 19 are formed through substrate 14 and are electrically connected to the outer bonding pads 18. Conductive leads (not shown) are formed on the upper surface of substrate 14 which connect each inner bond pad 16 with one of the conductive vias 19. Wires 20 are connected between die bond pads 22, located on die 12, and inner bond pads 16. Die bond pads 22 are electrically connected to the integrated circuit fabricated on die 12. Solder balls 26 are connected to outer bond pads 18 for electrical connection to a host PCB (not shown). A plastic cover 24 is molded over die 12 and wires 20 for protection.
Beneficial electrical characteristics of standard PBGA package 10 arise from the short signal paths between die 12 and solder balls 26. That is, the effective inductance of standard PBGA package 10 on the performance of die 12 is relatively low due in part to the short signal path distances between die 12 and solder balls 26.
A problem with the electrical characteristics of standard PBGA package 10 is that it provides inadequate EMI/RFI protection in many wireless and telecommunication devices. This problem arises because the only protection from EMI/RFI is plastic cover 24. Of course, a shield may be placed over the plastic cover 24, but the shield would require a ground connection to be effective, and may not adequately shield EMI/RFI.
Another problem with standard PBGA package 10 is that it has relatively poor heat dissipation capabilities. Typically, heat generated by die 12 is transmitted through substrate 14 and solder balls 26 to an underlying PCB. However, in peripheral array PBGA packages in which the solder balls are placed around a perimeter of the substrate (that is, not underneath the die), heat generated by the die becomes trapped within the package, thereby causing a substantial increase in die temperature. This is a particular problem with peripheral PBGA arrays when a plastic substrate is used because the die is completely encapsulated in plastic, which is a poor heat conductor.
It is therefore highly desirable to provide a BGA package which has improved electrical and thermal characteristics.
FIG. 1(B) shows a known BGA package which addresses some of the above-mentioned problems associated with standard PBGA package 10. The BGA package shown in FIG. 1(B) is referred to as a "super", "cavity", or "cavity down" BGA package (hereafter referred to as a "super BGA package").
Referring to FIG. 1(B), super BGA package 100 includes a substrate 101 provided with a recessed central cavity 102. A heat-conducting copper plate 103 is mounted on a first surface of substrate 101, and a die 104 is mounted on copper plate 103. Die 104 is thermally connected to copper plate 103 and electrically connected to first bonding pads formed on a second surface of substrate 101 by wires 105 using conventional wire bonding methods. A resin dam 106 is formed on the second surface of substrate 101 to contain a resin-based encapsulation material 107 formed over die 104 and wires 105. Finally, solder balls 108 are mounted on the second surface of substrate 101 such that each solder ball 108 contacts one of a plurality of second bonding pads. The first and second bonding pads are connected by conductive leads formed on the upper surface of substrate 101.
Super BGA package 100 has better thermal characteristics than the standard PBGA package 10 because die 104 is directly attached to copper plate 103, which is an excellent heat conductor. Therefore, heat generated by die 104 is effectively transmitted away from die 104 by copper plate 103. Further, wires 105 and solder balls 108 are located on the same side of super BGA package 100. Therefore, die 104 is partially protected from EMI/RFI by copper plate 103 while maintaining an overall thickness which is typically less than standard PBGA package 10.
A problem arises with the electrical characteristics of super BGA package 100 because signals passing from die 104 to solder balls 108 must traverse relatively long conductive paths. These long conductive paths cause the effective inductance of super BGA package 100 to be significantly greater than the effective inductance of standard PBGA package 10.
Further, super BGA package 100 differs from standard PBGA package 10 (see FIG. 1(A)) in that the bonding pads (not shown) of die 104 and solder balls 108 face in a common direction Y (that is, upward in FIG. 1(B)). Therefore, wire bonding and solder ball attachment are performed on the same side (the upward-facing side in FIG. 2(B)), which is the side facing a PCB when super BGA package 100 is mounted on the PCB. This "cavity down" arrangement creates a problem in that it is not possible to apply test probes to die 104 after die attach to test for incomplete or faulty connections to the package. During probe testing, BGA packages are typically placed onto a flat test fixture such that solder balls 108 electrically contact a series of test pads formed on the test member. The test probe is then contacted onto the bonding pads of the die to test the wire bond connections. Probe testing is easily carried out on standard PBGA package 10. However, it is impossible to use this testing procedure with super BGA package 100 because, as mentioned above, die 104 and solder balls 108 face in the same direction (toward the test fixture), thereby making it impossible to apply the probes to the die bonding pads when solder balls 108 are contacting the test fixture.
It is therefore highly desirable to provide a PBGA package which provides enhanced electrical and thermal characteristics.